JPEG Display Process pages-7

Notes

This function is also directly accessible through a far call from the application. The address of the BIOS function may be obtained by using VESA BIOS Function 01h, Return Super VGA mode information. A field in the ModeInfoBlock contains the address of this function. Note that this function may be different among video modes in a particular BIOS implementation, so the function pointer should be obtained after each set mode.

In the far call version, no status information is returned to the application. Also, the AX and DX registers will be destroyed. Therefore, if AX and/or DX must be preserved, the application must do so priot to making the far call.

The application must load the input arguments in BH, BL, and DX (for set window) but does not need to load either AH or AL in order to use the far call version of this function.

CPU Video Memory Windows

A standard VGA sub-system provides 256k bytes of memory and a corresponding mechanism to address this memory. Super VGAs and their modes require more than the standard 256k bytes of memory but also require that the address space for this memory be restricted to the standard address space for compatibility reasons. CPU video memory windows provide a means of accessing this extended VGA memory within the standard CPU address space.

This chapter describes how several hardware implementations of CPU video memory windows operate, their impact on application software design, and relates them to the software model presented by the VESA VGA BIOS extensions.

The VESA CPU video memory windows functions have been designed to put the performance insensitive, non-standard hardware functions into the BIOS while putting the performance sensitive, standard hardware functions into the application. This provides portability among VGA systems together with the performance that comes from accessing the hardware directly. In particular, the VESA BIOS is responsible for mapping video memory into the CPU address space while the application is responsible for performing the actual memory read and write operations.

This combination software and hardware interface is accomplished by informing the application of the parameters that control the hardware mechanism of mapping the video memory into the CPU address space and then letting the application control the mapping within those parameters.

Hardware Limited to 64k/128k of CPU address space

The first consideration in implementing extended video memory is to give access to the memory to application software. The standard VGA CPU address space for 16 color graphics modes is typically at segment A000h for 64k. This gives access to the 256k bytes of a standard VGA, i.e. 64k per plane. Access to the extended video memory is accomplished by mapping portions of the video memory into the standard VGA CPU address space.

Every Super VGA hardware implementation provides a mechanism for software to specify the offset from the start of video memory which is to be mapped to the start of the CPU address space. Providing both read and write access to the mapped memory provides a necessary level of hardware support for an application to manipulate the extended video memory.

Crossing CPU video memory boundaries

The organization of most software algorithms which perform video operations consists of a pair of nested loops: and outer loop over rows or scan lines and an inner loop across the row or scan line. The latter is the proverbial inner loop, which is the bottle neck to high performance software.

If a target rectangle is large enough, or poorly located, part of the required memory may be with within the video memory mapped into the CPU address space and part of it may not be addressable by the CPU without changing the mapping. It is desirable that the test for remapping the video memory is located outside of the inner loop.

This is typically accomplished by selecting the mapping offset of the start of video memory to the start of the CPU address space so that at least one entire row or scan line can be processed without changing the video memory mapping. There are currently no Super VGAs that allow this offset to be specified on a byte boundary and there is a wide range among Super VGAs in the ability to position a desired video memory location at the start of the CPU address space.

The number of bytes between the closest two bytes in video memory that can be placed on any single CPU address is defined as the granularity of the window function. Some Super VGA systems allow any 4k video memory boundary to be mapped to the start of the CPU address space, while other Super VGA systems allow any 64k video memory boundary to be mapped to the start of the CPU address space. These two example systems would have granularities of 4k and 64k, respectively. This concept is very similar to the bytes that can be accessed with a 16 bit pointer in an Intel CPU before a segment register must be changed (the granularity of the segment register or mapping here is 16 bytes).

Notes

If the granularity is equal to the length of the CPU address space, i.e. the least significant address bit of the hardware mapping function is more significant than the most significant bit of the CPU address, then the inner loop will have to contain the test for crossing the end or beginning of the CPU address space. This is because if the length of the CPU address space (which is the granularity in this case) is not evenly divisible by the length of a scan line, then the scan line at the end of the CPU address will be in two different video memory which cannot be mapped into the CPU address space simultaneously.

Operating on data from different areas

It is sometimes required or convenient to move or combine data from two different areas of video memory. One example of this is storing menus in the video memory beyond the displayed memory because there is hardware support in all VGAs for transferring 32 bits of video data with an 8 bit CPU read and write. Two separately mappable CPU video memory windows must be used if the distance between the source and destination is larger than the size of the CPU video memory window.

Combining data from two different windows

The above example of moving data from one CPU video memory window to another CPU video memory only required read access to one window and only required write access to the other window. Sometimes it is convenient to have read access to both windows and write access to one window. An example of this would be a raster operation where the resulting destination is the source data logically combined with the original destination data.

Different types of hardware windows

Different hardware implementations of CPU video memory windows can be supported by the VESA BIOS extension. The information necessary for an application to understand the type of hardware implementation is provided by the BIOS to the application. There are three basic types of hardware windowing implementations and they are described below. The types of windowing schemes described below do not include differences in granularity. Also note that is possible for a VGA to use a CPU address space of 128k starting at segment A000h.

Single window systems

Some hardware implementations only provide a single window. This single window will be readable as well as writeable. However, this causes a significant performance degradation when moving data in video memory a distance that is larger than the CPU address space.

Dual window systems

Many Super VGAs provide two windows to facilitate moving data within video memory. There are two separate methods of providing two windows.

Overlapping windows

Some hardware implementations distinguish window A and window B by determining if the CPU is attempting to do a memory read or a memory write operation. When the two windows are distinguished by whether the CPU is trying to read or write they can, and usually do, share the same CPU address space. However, one window will be read only and the other will be write only.

Non-overlapping windows

Another mechanism used by two window systems to distinguish window A and window B is by looking at the CPU address within the total VGA CPU address space. When the two windows are distinguished by the CPU address within the VGA CPU address space the windows cannot share the same address space, but they can each be both read and written

Conclusion:

Function 00 is used to get the general information of the adapter gives list of supporting modes .

Function 01 is used to get the mode information.

Function 02 is used to set mode ( 24 bit mode ) we used 0x112 it supports 640x480 resolution and 16milion color depth.

Function 05 is used for sliding window control.

With these we can display any 24 bit image.