Interfacing concepts Memory Interfacing

What is memory interfacing?

nterfacing Memory

4.1 Interfacing Memory
While executing a program, the microprocessor needs to access memory frequently to read instruction codes and data stored in memory and the interfacing circuit enables that access.

4.1.1Memory Structure and Its requirements
Read/Write Memory (R/WM) is a group of registers to store binary information. Fig 1 shows a typical R/W memory chip, it has 1024 registers, each of which can store 8 bits indicated by 8 I/O lines.

An address should be placed on the address lines. The low-order address lines are decoded by the internal decoder of the memory chip, and the addressed register is identified.

The high-order address should be decoded to generate a Chip Select signal, and the memory chip is selected by asserting the Chip Select low.

To read from the addressed register, the should be asserted low to enable the output buffer, and then the data byte from the register will be placed on the I/O lines.

To write into the addressed register, the should be asserted low to enable the input buffer, and then data bits from the data lines are stored into the register.

To read from memory, the Z80 performs the following steps:

Places a 16 bit address on its address bus.

Asserts the to indicate that the address bus holds a valid address.

Asserts the signal low to indicate that it wants to read.

To write into memory, the Z80 performs the following steps:

Places a 16 bit address on the address bus.

Asserts and places data on the data bus.

Asserts signal.

Basic Concepts in Memory Interfacing

The primary function of memory interfacing is to allow the microprocessor to read from and write into a given register of memory chip.
Be able to select the chip
Identify the register
Enable the appropriate buffer.

Address Decoding
The process of address decoding should result in identifying a register with a given address; we should be able to generate a unique pulse for that address.

Illustrative Example
1Interfacing the 2764 EPROM
This is a memory chip commonly used in industry to develop microprocessor-based products. This is an 8k (8192  8) memory chip with 8 data lines and is housed in a 28-pin package.

Address Range and Memory Map

   A15	A14	A13	A12	A11	A10	A9 	A8	A7	A6	A5	A4	A3	A2	A1	A0	 
0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	= 0000H
0			 	 	 	 	 	 	 	 	 	 		 
0	0	0	1	1	1	1	1	1	1	1	1	1	1	1	1	= FFFFH

Interfacing CMOS 6116 Static R/W Memory This is a 2k static memory chip, organized as 2048  8 format. It has 11 address lines (A10-A0), 8 data lines and 3 control signals: , and (write enable).

Memory Address Range

Assuming the “don’t care” address lines A12 and A11 are at logic 0.

A15	A14	A13	A12	A11	A10	A9 	A8	A7	A6	A5	A4	A3	A2	A1	A0	 
1	0	0	X	X	0	0	0	0	0	0	0	0	0	0	0	= 8000H
4		 	 	 	 	 	 	 	 	 	 	 		 
1	0	0	X	X	1	1	1	1	1	1	1	1	1	1	1	= 87FFH

Designing Memory for the MCTS Project
MCTS is Microprocessor-Controlled Temperature System.

Memory Design: Problem Statement

Given the components as listed;



74LS 138 : 3 to 8 decoder

2732 (4k  8) : EPROM

6116 (2k  8) : CMOS R/W memory

Circuit Analysis

When the logic levels of A15-A12 are all 0, and the processor asserts to read from memory, the output O0 goes active and selects the chip. The address range of the EPROM is as follows:

A15	A14	A13	A12	A11	A10	A9 	A8	A7	A6	A5	A4	A3	A2	A1	A0	 
0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	= 0000H
0	 		 	 	 	 	 	 	 	 	 	 		 
 	 	 	 	1	1	1	1	1	1	1	1	1	1	1	1	= 0FFFH

A15	A14	A13	A12	A11	A10	A9 	A8	A7	A6	A5	A4	A3	A2	A1	A0	 
0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	= 2000H
2	 		 	 	 	 	 	 	 	 	 	 		 
 	 	 	 	0	1	1	1	1	1	1	1	1	1	1	1	= 27FFH

We know that a microprocessor is the CPU of a computer. A microprocessor can perform some operation on a data and give the output. But to perform the operation we need an input to enter the data and an output to display the results of the operation. So we are using a keyboard and monitor as Input and output along with the processor. Microprocessors engineering involves a lot of other concepts and we also interface memory elements like ROM, EPROM to access the memory.

Interfacing Types There are two types of interfacing in context of the 8085 processor.

Memory Interfacing.

I/O Interfacing.

Memory Interfacing:
While executing an instruction, there is a necessity for the microprocessor to access memory frequently for reading various instruction codes and data stored in the memory. The interfacing circuit aids in accessing the memory.

Memory requires some signals to read from and write to registers. Similarly the microprocessor transmits some signals for reading or writing a data.

But what is the purpose of interfacing circuit here?

The interfacing process involves matching the memory requirements with the microprocessor signals. The interfacing circuit therefore should be designed in such a way that it matches the memory signal requirements with the signals of the microprocessor. For example for carrying out a READ process, the microprocessor should initiate a read signal which the memory requires to read a data. In simple words, the primary function of a memory interfacing circuit is to aid the microprocessor in reading and writing a data to the given register of a memory chip

I/O Interfacing:
We know that keyboard and Displays are used as communication channel with outside world. So it is necessary that we interface keyboard and displays with the microprocessor. This is called I/O interfacing. In this type of interfacing we use latches and buffers for interfacing the keyboards and displays with the microprocessor.

But the main disadvantage with this interfacing is that the microprocessor can perform only one function. It functions as an input device if it is connected to buffer and as an output device if it is connected to latch. Thus the capability is very limited in this type of interfacing.

Programmable Peripheral Devices
Programmable peripheral devices were introduced by Intel to increase the overall performance of the system. These devices along with I/O functions, they perform various other functions such as time delays, counters and interrupt handling. These devices are nothing but a combination of many devices on a single chip. A programmable device can be set up to perform specific function by writing a code in the internal register. As this code controls the function of the device it’s called control word and internal register in which it is stored is called Control Register.

INTEL developed some peripheral devices for processors like 8085/8086/8088. The peripheral devices includes

8255 – Parallel Communication Interface (PPI)

8251 – Serial communication Interface (USART- Universal Synchronous/Asynchronous Receiver/Transmitter)

8257 – DMA Controller

8279 – Keyboard/Display Controller

8259 – Programmable Interrupt controller

8254 – Programmable Timer

Types of Communication Interface
There are two ways in which a microprocessor can connect with outside world or other memory systems.

Serial Communication Interface

Parallel Communication interface

Serial Communication Interface:
In serial communication interface, the interface gets a single byte of data from the microprocessor and sends it bit by bit to other system serially (or) the interface receives data bit by bit serially from the external systems and converts the data into a single byte and transfers it to the microprocessor.

Parallel Communication Interface:
This interface gets a byte of data from microprocessor and sends it bit by bit to the other systems in simultaneous (or) parallel fashion. The interface also receives data bit by bit simultaneously from the external system and converts the data into a single byte and transfers it to microprocessor.

Consider that we have a microprocessor interfaced to both I/O device and also a memory chip. Now how to select between the two devices according to the requirement?

For this purpose an address decoding circuit is used. An address decoding circuit aids in selecting the required I/O device or a memory chip.

Let us discuss the concept of Memory interfacing and I/O interfacing in the next article.